fcCuBE

Flip Chip with Cu Column, BOL and Enhanced Processes (fcCuBE)



Flip Chip Redefined Flip Chip Redefined

Flip Chip Redefined


STATS ChipPAC has taken its innovative Low Cost Flip Chip (LCFC) technology and enhanced it to achieve greater design flexibility and performance across a broader range of applications, I/O requirements and fab nodes.  This enhanced technology has been renamed "fcCuBETM" to better describe its broader range of enhanced features and capabilities: flip chip with Cu Column, BOL and Enhanced Processes.

A Transformative Flip Chip Technology

fcCuBETM technology leverages innovations such as copper (Cu) column bump, patented Bond-on-Lead (BOL) interconnection and enhanced assembly processes such as mold underfill (MUF) to deliver high input/output (I/O) density, performance and superior reliability in advanced silicon nodes while retaining the low price points which make it competitive with mainstream semiconductor packaging solutions available today. This combination of enhancements allows greater design flexibility utilizing relaxed substrate design rules and a streamlined manufacturing process.

fcCuBETM packages are produced on substrates with matrix strip or singulated format, and use overmolding and saw singulation processes for strip base substrate similar to wirebond packages of the same form factor. The fcBGA is typically an exposed die package with CUF (capillary underfill); fcFBGA is typically an overmolded package; both fcBGA and fcFBGA use solder balls for second level (BGA) interconnection; fcFBGA-SDx represents a variation of fcFBGA comprising a “hybrid” stacked construction, i.e., flip chip die on the bottom and wirebond die on the top; while the fcLGA is an exposed die product that does not have solder balls.

STATS ChipPAC’s fcCuBE packages are available in ball counts ranging from 32 to > 1000 depending on body size and external terminal (BGA) pitch. Other features such as heat spreaders for thermal enhancement, surface mounted passive components, etc. that are offered with traditional fcFBGA and fcBGA packages are also available for fcCuBETM packages.

Highlights

  • Copper (Cu) column with Pb-free cap
  • Patented, routing-efficient Bond on Lead (BOL) interconnection structure and optimized bump layout help “fit” flip chip designs into low cost laminate substrates
  • Mechanics of BOL interconnect structure eliminates ELK/ULK damage on advanced Si node devices despite use of Cu column (Pb-free) bump metallurgy and dense routing
  • Finer effective bump pitches achievable through high routing efficiency of BOL technology
  • Scalable to high I/O density and fine bump pitch down to 80µm without burden on substrate design rules
  • Mold underfill (MUF) with Cu column bump process technology for higher throughput
  • Elimination of Solder-on-Pad (no-SOP) and relaxation of line/space design rules offer lowest flip chip substrate cost
  • Smaller package size and lower electrical parasitics compared to corresponding wirebond package options
  • Superior electromigration life with Cu column bump
  • Excellent reliability margins: passed 3000 cycles TCB/3000 hours HTS (well above industry standard requirement of 1000x each)
  • Cost reduction of 20-40% over standard flip chip packages for most designs

Features

  • Bumped wafer thinning: 100µm Si thickness in production, 75µm qualified
  • 0.40mm minimum package ball (BGA) pitch in production
  • High density matrix strip for fcFBGA and wide boat format for singulated fcBGA
  • Conventional 2/4 layer laminate, laminate build-up (BU) and ABF BU substrates
  • In-house Cu column wafer bumping for 200 and 300mm wafers
  • Mold underfill (MUF) and Capillary underfill (CUF optional) with Cu column bump
  • Broad fab node compatibility: 180n, 65n-LK, 40/28n-ELK/ULK
  • Applicable across broad package range: fcBGA, fcFBGA /-H (fcCSP) and fcPoP (3D)
  • Wide range of package body sizes: 4 x 4mm to > 40 x 40mm
  • Cost-effective manufacturing flow using conventional reflow process
  • Optional interconnection methods available: Mass Reflow or Thermo Compression Bonding (TCB) (based on Si node, I/O design and product timing)

End Applications

fcCuBE is a compelling solution for a wide cross section of end products in the mobile/handheld, computing and high-end network/telecom markets, including devices for wireless and portable products such as RFICs and power/analog ICs driven by miniaturization and low package parasitics, and for ASIC, graphics, computing and networking products driven by superior electrical and thermal performance.